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Title:
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SIMULATING UML MODEL OF EMBEDDED REAL-TIME SYSTEMS |
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Author(s):
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Marco A. Wehrmeister, João G. Packer, Luis M. Ceron, Gian R. Berkenbrock |
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ISBN:
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978-989-8533-06-7 |
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Editors:
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Hans Weghorn, Leonardo Azevedo and Pedro Isaías |
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Year:
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2011 |
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Edition:
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Single |
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Keywords:
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Simulation, UML, Model-Driven Engineering, Embedded and Real-Time Systems |
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Type:
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Full Paper |
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First Page:
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363 |
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Last Page:
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370 |
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Language:
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English |
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Cover:
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Full Contents:
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click to dowload 
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Paper Abstract:
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It is widely known that the earlier an error is found in the design, lesser is the cost to repair it. Thus, the usage of validation and verification techniques to improve the detection of errors in earlier phases (e.g. system specification) is essential. This work presents a simulation framework to automate the verification of embedded and real-time systems high-level behavior specification. Thus, the engineers can, already in earlier design stages, simulate the execution of systems behavior specified using high-level modeling languages, such as UML models. The achieved results show that early simulation of UML models is practicable, opening room for its usage in modeling CASE tools for early verification and validation of the specification of embedded and real-time systems. |
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