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Title:
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OPTIMISED FPGA IMPLEMENTATION OF A MULTI PROGRAM PCR MEASUREMENT SYSTEM IN DVB-T |
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Author(s):
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C. Mannino , H. Rabah , C. Tanougast , Y. Berviller , M. Janiaut , S. Weber |
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ISBN:
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972-99353-8-6 |
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Editors:
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João M. P. Cardoso |
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Year:
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2005 |
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Edition:
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Single |
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Keywords:
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ADPLL, Architecture optimisation, FPGA, PCR related measurement. |
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Type:
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Workshop Paper |
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First Page:
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13 |
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Last Page:
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21 |
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Language:
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English |
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Cover:
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Full Contents:
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click to dowload 
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Paper Abstract:
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The MPEG-2 DVB transport stream carries in addition to audio and video data a Program Clock Reference (PCR). This PCR is used to synchronise the MPEG-2 decoder clock in the receiver side for a given program. The synchronisation is generally achieved using a Phase Locked Loop (PLL) as it is recommended in the DVB-T Quality of Service (QoS) measurement standard. This PLL is used in a measurement system for MPEG-2 PCR analysis for QoS evaluation. A wireless transmitted transport stream can contain up to ten programs. We present in this paper an All-Digital PLL (ADPLL) implemented in an FPGA. The interest of this solution is to be able to implement as many ADPLLs as existing programs in the stream and without using others external elements. The measurements of PCRs parameters for the QoS estimation can be achieved either with an embedded processor, or with an external processor. We present some solutions for surface optimisation and the execution time of the overall architecture aiming the real-time processing of PCRs parameters of all programs within a transport stream. |
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