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Title:      INSTRUCTION LEVEL PARALLELISM OF STACK-CODE UNDER VARIED ISSUE WIDTHS, AND ONE-LEVEL BRANCH PREDICTION
Author(s):      Dr.chris Bailey , Huibin Shi
ISBN:      972-99353-6-X
Editors:      Nuno Guimarães and Pedro Isaías
Year:      2005
Edition:      1
Keywords:      Stack-architecture, issue-width, scalability, branch prediction, embedded-systems .
Type:      Full Paper
First Page:      23
Last Page:      30
Language:      English
Cover:      cover          
Full Contents:      click to dowload Download
Paper Abstract:      Stack architecture research interests have surfaced again in recent years, however stack machines are generally regarded as sequential execution architectures. By assuming that ILP (Instruction-Level Parallelism) can be exploited in a stack machine, we are able to use static analysis to uncover and measure available such instruction level parallelism as it naturally exists in the stack code of a hypothetical architecture. With increasing issue widths, a superscalar stack machine is shown to be modestly scalable, and displays improved scalability with the impact of branch prediction considered. This paper also indicates some of the limitations of the issue width expansion, which is confined by the available ILP of the stack code.
   

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