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Title:
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EXPLOITING DATA REUSE IN MODERN FPGAS: OPPORTUNITIES AND CHALLENGES FOR COMPILERS |
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Author(s):
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Nastaran Baradaran , Pedro Diniz |
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ISBN:
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972-99353-8-6 |
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Editors:
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João M. P. Cardoso |
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Year:
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2005 |
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Edition:
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Single |
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Keywords:
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FPGAs, Data Reuse Analysis, Data Mapping and Management. |
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Type:
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Keynote |
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First Page:
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1 |
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Last Page:
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10 |
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Language:
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English |
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Cover:
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Full Contents:
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click to dowload 
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Paper Abstract:
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Current high-end Field-Programmable-Gate-Array (FPGA) parts offer a large number of configurable resources. These can be organized in custom storage structures such as tapped-delay lines, in addition to a number of very dense high-capacity Random-Access-Memory (RAM) and Content-Addressable-Memory (CAM) blocks. The extreme flexibility of the size, organization and interconnection between these storage resources enables compilers to generate custom hardware designs tailored to capture the application-specific data reuse opportunities. In this paper we outline the basic compiler data dependence analyses approaches that can be used to uncover reuse opportunities within a loop nest. We then describe the challenges of exploiting these opportunities in modern FPGAs. |
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