Title:
|
CODE OPTIMIZATION FOR MICROPROCESSORS OF THE INTEL® PENTIUM® 4 FAMILY |
Author(s):
|
Luís F. Figueiredo , Mário M. Freire |
ISBN:
|
972-98947-3-6 |
Editors:
|
Nuno Guimarães and Pedro Isaías |
Year:
|
2004 |
Edition:
|
Single |
Keywords:
|
Cache Memory, Vectorization, SSE2, SIMD, Assembler, C/C++. |
Type:
|
Short Paper |
First Page:
|
2061 |
Last Page:
|
2065 |
Language:
|
English |
Cover:
|
|
Full Contents:
|
click to dowload
|
Paper Abstract:
|
The increased performance provided by several types of commercially available computers, associated with the new functionalities of high level programming languages, leads to a move away of many programmers from low level programming languages. This fact, with all its inherent advantages, can still bring some disadvantages, which include the unfamiliarity with some principles of Computer Architecture. Certainly, in most of real-world situations, these disadvantages are absolutely negligible regarding the large processing capacity of computers, nonetheless there will be cases where time is one of the most important factors in the running of the applications, for which time optimization is of particular importance. In this paper, using an Intel Pentium 4 equipped computer as a test subject, various tests were performed whose objectives were the measurement of the total processing time for some of the simplest, and most basic, computing tasks that show the inability of one of the most used compilers to perform full code optimizations. Obtained results show that the knowledge of Computer Architecture by programmers could lead to practical advantages in the construction of their algorithms, with direct consequences on the performance of their applications. |
|
|
|
|